1 |
A flip-flop is connected to +5 volts and it draws 5 mA of current during its operation, the power dissipation of the flip-flop is |
10 mW
25 mW
64 mW
1024
|
2 |
A positive edge-triggered flip-flop changes its state when ________________ |
Low-to-high transition of clock
High-to-low transition of clock
Enable input (EN) is set
Preset input (PRE) is set
|
3 |
Demultiplexer is also called. |
Data selector
Data router
Data distributor
Data encoder
|
4 |
An alternate method of implementing Comparators which allows the Comparators to be easily cascaded without the need for extra logic gates is _______ |
Using a single comparator
Using Iterative Circuit based Comparators
Connecting comparators in vertical hierarchy
Extra logic gates are always required
|
5 |
"A + B = B + A" is __________ |
Demorgan‟s Law
Distributive Law
Commutative Law
Associative Law
|
6 |
The sequence of states that are implemented by a n-bit Johnson counter is |
n+2 (n plus 2)
2n (n multiplied by 2)
2n (2 raise to power n)
n2 (n raise to power 2)
|
7 |
Above is the circuit diagram of _______. |
Asynchronous up-counter
Asynchronous down-counter
Synchronous up-counter
Synchronous down-counter
|
8 |
______ of a D/A converter is determined by comparing the actual output of a D/A converter with the expected output. |
Resolution
Missing Code
Accuracy
Quantization
|
9 |
FIFO is an acronym for __________ |
First In, First Out
Fly in, Fly Out
Fast in, Fast Out
None of given options
|
10 |
The address from which the data is read, is provided by _______ |
Depends on circuitry
None of given options
RAM
Microprocessor
|