CS-302 Quiz Preparation Virtual University With Answers

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CS-302 Quiz Preparation Virtual University

Sr. # Questions Answers Choice
1 In _______ the Q output of the last flip-flop of the shift register is connected to the data input of the first flipflop. Moore machine Meally machine Johnson counter Ring counter
2 At T0 the value stored in a 4-bit left shift was “1”. What will be the value of register after three clock pulses? 2 4 6 8
3 A synchronous decade counter will have _______ flip-flops 3 4 7 10
4 A divide-by-50 counter divides the input ______ signal to a 1 Hz signal. 10 Hz 50 Hz 100 Hz 500 Hz
5 A counter is implemented using three (3) flip-flops, possibly it will have ________ maximum output status. 3 7 8 15
6 A negative edge-triggered flip-flop changes its state when ________________ Enable input (EN) is set Preset input (PRE) is set Low-to-high transition of clock High-to-low transition of clock
7 A positive edge-triggered flip-flop changes its state when ________________ Low-to-high transition of clock High-to-low transition of clock Enable input (EN) is set Preset input (PRE) is set
8 Demultiplexer converts _______ data to __________ data. Parallel data, serial data Serial data, parallel data Encoded data, decoded data All of the given options
9 The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels? A > B = 1, A < B = 0, A < B = 1 A > B = 0, A < B = 1, A = B = 0 A > B = 1, A < B = 0, A = B = 0 A > B = 0, A < B = 1, A = B = 1
10 The OR Gate performs a Boolean _______ function Addition Subtraction Multiplication Division
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