Question # 1

in ____________, all the columns in the same row are either read or written.

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Sequential Access

MOS Access

FAST Mode Page Access

None of given options

WHEN BOTH THE INPUTS OF EDGE-TRIGGERED J-K FLOP-FLOP ARE SET TO LOGIC ZERO.

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THE FLOP-FLOP IS TRIGGERED

Q=0 AND Q‟=1

Q=1 AND Q’=0

THE OUTPUT OF FLIP-FLOP REMAINS UNCHANGED

In a state diagram, the transition from a current state to the next state is determined by

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Current state and the inputs

Current state and outputs

Previous state and inputs

Previous state and outputs

___________ is one of the examples of asynchronous inputs.

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J-K input

S-R input

D input

Clear Input (CLR)

RCO Stands for _________

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Reconfiguration Counter Output

Reconfiguration Clock Output

Ripple Counter Output

Ripple Clock Output

NAND gate is formed by connecting _________

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AND Gate and then NOT Gate

NOT Gate and then AND Gate

AND Gate and then OR Gate

OR Gate and then AND Gate

THE GLITCHES DUE TO RACE CONDITION CAN BE AVOIDED BY USING A ___________

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GATED FLIP-FLOPS

PULSE TRIGGERED FLIP-FLOPS

POSITIVE-EDGE TRIGGERED FLIP-FLOPS

NEGATIVE-EDGE TRIGGERED FLIP-FLOPS

Addition of two octal numbers “36” and “71” results in ________

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213

123

127

345

____________ is said to occur when multiple internal variables change due to change in one input variable

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Clock Skew

Race condition

Hold delay

Hold and Wait

The design and implementation of synchronous counters start from _________

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Truth table

k-map

state table

state diagram

The output of an AND gate is one when _______

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All of the inputs are one

Any of the input is one

Any of the input is zero

All the inputs are zero

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