1 |
The _____________ input overrides the ________ input. |
Asynchronous, synchronous
Synchronous, asynchronous
Preset input (PRE), Clear input (CLR)
Clear input (CLR), Preset input (PRE)
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2 |
____________ is said to occur when multiple internal variables change due to change in one input variable. |
Clock Skew
Race condition
Hold delay
Hold and Wait
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3 |
74HC163 has two enable input pins which are _______ and _________. |
ENP, ENT
ENI, ENC
ENP, ENC
ENT, ENI
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4 |
The minimum time for which the input signal has to be maintained at the input of flip-flop is called ______ of the flip-flop. |
Set-up time
Hold time
Pulse Interval time
Pulse Stability time
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5 |
The divide-by-60 counter in digital clock is implemented by using two cascading counters: |
Mod-6, Mod-10
Mod-50, Mod-10
Mod-10, Mod-50
Mod-50, Mod-6
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6 |
In a sequential circuit the next state is determined by ________ and _______. |
State variable, current state
Current state, flip-flop output
Current state and external input
Input and clock signal applied
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7 |
A 8-bit serial in / parallel out shift register contains the value “8”, _____ clock signal(s) will be required to shift the value completely out of the register. |
1
2
4
8
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