1 |
A GAL is essentially a ________. |
Non-reprogrammable PAL
PAL that is programmed only by the manufacturer
Very large PAL
Reprogrammable PAL
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2 |
A multiplexer with a register circuit converts _________ |
Serial data to parallel
Parallel data to serial
Serial data to serial
Parallel data to parallel
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3 |
The operation of J-K flip-flop is similar to that of the SR flip-flop except that the J-K flip-flop ___________ |
Doesn’t have an invalid state
Sets to clear when both J = 0 and K = 0
It does not show transition on change in pulse
It does not accept asynchronous inputs
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4 |
LUT is acronym for _________. |
Look Up Table
Local User Terminal
Least Upper Time Period
None of given options
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5 |
Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first.) |
1100
0011
0000
1111
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6 |
________ is used to simplify the circuit that determines the next state. |
State diagram
Next state table
State reduction
State assignment
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7 |
In a state diagram, the transition from a current state to the next state is determined by |
Current state and the inputs
Current state and outputs
Previous state and inputs
Previous state and outputs
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8 |
Consider an up/down counter that counts between 0 and 15, if external input(X) is “0” the counter counts upward (0000 to 1111) and if external input (X) is “1” the counter counts downward (1111 to 0000), now suppose that the present state is “1100” and X=1, the next state of the counter will be ___________ |
0000
1101
1011
1111
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9 |
__________occurs when the same clock signal arrives at different times at different clock inputs due to propagation delay. |
Race condition
Clock Skew
Ripple Effect
None of given options
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10 |
___________ is one of the examples of synchronous inputs. |
J-K input
EN input
Preset input (PRE)
Clear Input (CLR)
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