1 |
Given the state diagram of an up/down counter, we can find ________ |
The next state of a given present state
The previous state of a given present state
Both the next and previous states of a given state
The state diagram shows only the inputs/outputs of a given states
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2 |
____________ is said to occur when multiple internal variables change due to change in one input variable |
Clock Skew
Race condition
Hold delay
Hold and Wait
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3 |
74HC163 has two enable input pins which are _______ and _________ |
ENP, ENT
ENI, ENC
ENP, ENC
ENT, ENI
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4 |
Flip flops are also called _____________ |
Bi-stable dualvibrators
Bi-stable transformer
Bi-stable multivibrators
Bi-stable singlevibrators
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5 |
The divide-by-60 counter in digital clock is implemented by using two cascading counters |
Mod-6, Mod-10
Mod-50, Mod-10
Mod-10, Mod-50
Mod-50, Mod-6
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6 |
In a sequential circuit the next state is determined by ________ and _______ |
State variable, current state
Current state, flip-flop output
Current state and external input
Input and clock signal applied
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7 |
A frequency counter ______________ |
Counts pulse width
Counts no. of clock pulses in 1 second
Counts high and low range of given clock pulse
None of given options
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8 |
A positive edge-triggered flip-flop changes its state when ________________. |
Low-to-high transition of clock
High-to-low transition of clock
Enable input (EN) is set
Preset input (PRE) is set
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9 |
In order to synchronize two devices that consume and produce data at different rates, we can use _________ |
Read Only Memory
Fist In First Out Memory
Flash Memory
Fast Page Access Mode Memory
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10 |
in ____________, all the columns in the same row are either read or written. |
Sequential Access
MOS Access
FAST Mode Page Access
None of given options
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