Question # 1

If an S-R latch has a 1 on the S input and a 0 on the R input and then the S input goes to 0, the latch will be

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set

reset

invalid

clear

Demultiplexer is also called.

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Data selector

Data router

Data distributor

Data encoder

If the S and R inputs of the gated S-R latch are connected together using a ______gate then there is only a single input to the latch. The input is represented by D instead of S or R (A gated D-Latch)

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AND

OR

NOT

XOR

The ABEL symbol for “OR” operation is

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!

&

#

$

The basic building block for a logical circuit is _______

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A Flip-Flop

A Logical Gate

An Adder

None of given options

A synchronous decade counter will have _______ flip-flops

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3

4

7

10

The three fundamental gates are ___________

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AND, NAND, XOR

OR, AND, NAND

NOT, NOR, XOR

NOT, OR, AND

Demultiplexer converts _______ data to __________ data.

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Parallel data, serial data

Serial data, parallel data

Encoded data, decoded data

All of the given options

Sum term (Max term) is implemented using ________ gates

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OR

AND

NOT

OR-AND

The alternate solution for a multiplexer and a register circuit is _________

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Parallel in / Serial out shift register

Serial in / Parallel out shift register

Parallel in / Parallel out shift register

Serial in / Serial Out shift register

A counter is implemented using three (3) flip-flops, possibly it will have ________ maximum output status

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3

7

8

15

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