CS-302 Quiz Preparation Virtual University MCQs With Answers

Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first.)

3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series

For a gated D-Latch if EN=1 and D=1 then Q(t+1) = _________

in ____________, all the columns in the same row are either read or written.

______ of a D/A converter is determined by comparing the actual output of a D/A converter with the expected output

The decimal “17” in BCD will be represented as _________10001(right opt is not given)

FIFO is an acronym for __________

Consider an up/down counter that counts between 0 and 15, if external input(X) is “0” the counter counts upward (0000 to 1111) and if external input (X) is “1” the counter counts downward (1111 to 0000), now suppose that the present state is “1100” and X=1, the next state of the counter will be ___________

What is the difference between a D latch and a D flip-flop?

________ is used to minimize the possible no. of states of a circuit.

____________ counters as the name indicates are not triggered simultaneously.