Question # 1

The information on the data bus in transferred to the ______ register.

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MOC

MDR

VAM

CPU

_______ is the most commonly used cache controller with a number of processor sets.

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L 211 controller

L 210 controller

L 214 controller

None

Which point to the __________ of the stack

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TOP

Start

Mid

None

The range of this rating for which microprocessor of.

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VLSI

Motorola

Intel

Zilog

Which is the commonly used programmable interface and particular used to provide handshaking.

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8251

8354

8459

8255

In which register instruction is decoded prepared and ultimately executed.

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Instruction register

Current register

Both a and b

None

What is the maximum clock speed of PIII processor.

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1.0 GHz

1.1 GHz

1.2 GHz

1.3 GHz

The fetch execute cycle is to use a system know as.

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Assembly line

Pipelining

Cache

None

Which is not the open source OS.

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Debian

BSD unix

Gentoo and Red Hat Linux

Windows

Which causes the microprocessor to immediately terminate its present activity.

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RESET Signal

INTERUPT signal

Both

None

How many parts of dedicated register.

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2

4

5

6

How many ways fo transferring data between the microprocessor and a physical I/O device.

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2

3

4

5

Which corporation decided to use 8088 microprocessor in personal computer.

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IBM

CRT

PMN

SPS

An externa feedback resistor acts to control the.

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Gain

Gate

Loss

Profit

The ____________ was very successful in the calculator market at that time.

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Motorola 6800 and 6809

Microprocessor 4004

Intel 8085

None

The upper 8 bit are called.

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BH

AH

BL

DL

Who was introduce the 80286 micro processor updated on 80086 in 1983.

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Motorola

Fairchild

Intel

all of above

Who is the determined by the time taken by the stages the requires the most processing time.

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Clock period

Flow through

Through out

None

How many type of cache memory

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1

2

3

4

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