Question # 1

The size of each segment in 8086 is

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64 Kb

24 kb

50 kb

16 kb

T1 is the time taken for the stage and there are n stages in the.

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Through out

Assembly line

Both a and b

None

Which is widely used in interrupt controller with a number of microprocessor.

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8251

8254

8255

8259

What is the period of fourth generation

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1979 - 1980

1981-1995

1995-2000

1974-1980

DAC stand for

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Analogue to analogue converters

Analogue to digital converters

Digital to digital converters

Digital to analogue converters

_______ is the most commonly used cache controller with a number of processor sets.

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L 211 controller

L 210 controller

L 214 controller

None

BCD stand for

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Binary coded decimal

Binary coded decoded

Both a and b

None

SP stand for

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Stack pointer

Stack POP

Stack Push

None

The information on the data bus in transferred to the ______ register.

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MOC

MDR

VAM

CPU

Which formula is used to calculate the number of write stall cycles.

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Reads * read miss rate* read miss penalty

write * write miss + Write buffer stalls

Memory access* cache miss rate * cache miss penalty

None

The lower and bit are called.

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AL

CL

BL

DL

How many architectural paradigms in microprocessor.

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2

3

4

6

Motorola has declined from having nearly __________ share of the microprocessor market to much smaller share.

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30%

40%

50%

60%

Which register is connected to the memory by way of the address bus.

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MAR

MDR

SAM

None

OCW stand for

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Operational command words

Operational conjunction words

Operational control words

Operational cost words

The time taken for all stages of the assembly line to become active is called the

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Flow through time

Clock period

Through put

All of these

Which is 16 bit microprocessor .

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8088

8086

8085

All of these

SBA stand for

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Segment bus address

Segment not address

Segment base address

Segment byte address

Which type of RAM need regular referred.

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Dynamic RAM

Static RAM

Permanent RAM

SD RAM

MSD stand for

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Least significant digit

Most significant digit

Medium significant digit

Low significant digit

Which register is used to communicate with memory.

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MAR

MDR

Both a and b

None

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