Question # 1

Who is the Brian of computer

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ALU

CPU

MU

None

Which is the types of cache memory

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Fully associative cache

Direct mapped cache

Set associative cache

All of these

The network of wires or electronic path ways on mother board back side.

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PCB

BUS

Both a and b

None

SBA stand for

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Segment bus address

Segment not address

Segment base address

Segment byte address

IMR stand for

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Input mask register

Input mask resolver

Interrupt mask resolver

Interrupt mask register

How many types of classification of processor based on register section.

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1

2

3

4

Which is the microprocessor launched by intel

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z-8

8080

8000

None

BP stand for

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Bit pointer

Base pointer

Bus pointer

Byte pointer

The lower red curvy arrow show that CPU places the address extracted from the memory location on the.

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Address bus

System bus

Control bus

Data bus

T1 is the time taken for the stage and there are n stages in the.

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Through out

Assembly line

Both a and b

None

Inc case of direct mapped cache lower order line address bits are used the access the

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RAM

ROM

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2

4

6

8

INTR it implies the ___ signal

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Interrupt request

Interrupt Right

Interrupt Rough

interrupt Reset

The external device is connected to a pin called the_____ pin on the processor chip

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Interrupt

Tranasfer

Both a and b

None

Which multiplex by ADC 0808/0809

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2:4

3:8

4:16

None

Who work as a cache for the page table.

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TLB

TLP

LEB

WAB

PR stand for

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Priority register

Priority resolver

Priority request

None

The fourth generation of microprocessor came really as a soon boon to the.

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Computing environment

Processing environment

Hot environment

All of these

AEN stand for

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Address enable

Address equivalent

Acknowledgment enable

Acknowledgment equivalent

In which form CPU provide output

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Computer signals

Digital signals

Metal signals

None

A fourth bit called the

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Direct bit

Cache bit

Valid bit

All of these

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PPSC Computer Science Chapter 17 Microprocessor And Assembly Language Online Test MCQs With Answers

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